A reconfigurable logic circuit that is represented by a field programmable gate array (FPGA) realizes a predetermined logic (circuit configuration) based on data stored in a configuration memory.
A multi-context configuration memory (MCM) includes a plurality of memory cells and one output terminal and outputs data stored in one of a plurality of memory cells from the output terminal. A reconfigurable logic circuit including the MCM had been called a multi-context device for a short period, stores a plurality of pieces of circuit configuration information, and can change the circuit configuration according to a context switching signal. In the multi-context device, as the number of storable contexts is increased, the use efficiency of a logic circuit unit increases.
An MCM in which a memory cell is configured by using a static random access memory (SRAM) has been known. The SRAM is configured by six transistors and has a relatively large cell area. Since the area of the MCM unit sharply increases according to an increase in the number of contexts, it is difficult to increase the number of contexts. In addition, since the SRAM is volatile, data stored in the configuration memory disappears at time of the power interruption. For this reason, a technology for shutting off power at a standby time for implementing low power consumption cannot be applied.
Thus, a technology relating to an MCM configured by a memory cell that has a small cell area and is non-volatile has been requested.